Updated on June 3, 2021.

My research area is mainly on computer systems and embedded systems, with a prime focus on improving the capability of memory and storage systems. The research results were published in top conferences (e.g., ACM/IEEE DAC, ACM/IEEE ICCAD, and ACM/IEEE CODES) and top journals (e.g., IEEE TC, IEEE TCAD, IEEE TVLSI, ACM TECS, ACM TODAES, and ACM TOS). In the past five years, I have published 42 papers in top journals (i.e., ACM/IEEE Transactions) and 33 papers in top conferences. 

In the past five years (2016/6~2021/5), I received Outstanding Research Award from Ministry of Science and Technology (MOST) in 2021, K. T. Li Breakthrough Award from Institute of Information and Computing Machinery (IICM) 2018, Y. Z. Hsu Scientific Paper Award from Far Eastern Y.Z. Hsu Science and Technology Memorial Foundation in 2018, Career Development Award from Academia Sinica in 2017, Outstanding Electrical Engineering Professor Award from Chinese Institute of Electrical Engineering (CIEE) in 2017, Ta-You Wu Memorial Award from Ministry of Science and Technology (MOST) in 2016. Meanwhile, I am currently an associate editor of IEEE Transactions on Emerging Topics in Computing (TETC), ACM Transactions on Storage (TOS), and ACM Transactions on Cyber-Physical Systems (TCPS), and has been served as a program committee member for many top international conferences (including ACM/IEEE DAC, ACM/IEEE DAC ICCAD, ACM/IEEE ISLPED, IEEE RTSS, IEEE RTAS, and ACM/IEEE CODES+ISSS).

In addition to research, in the past few years, I also led a group of students and research assistants to work closely with industry, and have led several research projects, from which we have yielded fruitful results. In the past five years, we have been granted 18 US patents and 18 Taiwan patents. Meanwhile, we helped Genesys Logic, Etron, and VIA to develop efficient solid-state-derives. We also helped Macronix to develop advanced non-volatile memory (NVM) management and Processing-in-Memory (PIM) enabled deep learning techniques. We further helped ITRI to develop the next-generation NVDIMM-based main-memory systems. Below I highlight my recent contributions in 5 selected publications, which are related to memory/storage designs and machine learning techniques over NVMs, as follow:

[1] Crash Recovery Support from the Storage Level (USENIX OSDI 2020, Acceptance Ratio: 17%): In this work, we have a very positive result in the development of crash-recoverable storage devices. This result is published at the USENIX Operation Systems Design and Implementation (OSDI) conference [1], the most prestigious conference of system research; this is the first time that a Taiwanese team can publish a system research paper in OSDI in the past 26 years. In this work, we introduce the design of a snapshot-consistent flash translation layer (SCFTL) for flash disks, which provides a more robust guarantee about the possible behaviors after a crash than conventional designs. More specifically, the flush operation of SCFTL also has the functionality of making a “disk snapshot.” When a crash occurs, the flash disk is guaranteed to recover to the state right before the last flush. This work is the first attempt to leverage formal verification techniques to ensure the correctness of a complex FTL implementation. We developed a system to check our implementation’s correctness by integrating several verification tools. The major benefit of SCFTL is that it allows a more efficient design of upper layers in the storage stack. For example, the database system hosted by SCFTL does not require using a journal for crash recovery. Instead, it only needs to perform a flush operation of SCFTL at the end of each atomic transaction.

[2] NVM-friendly Bagging Strategy for Random Forest (IEEE NVMSA 2019 – Best Paper Award): In this direction, we focus on studying the key technologies for running machine learning applications/algorithms, including neural network and random forest, on the systems with non-volatile memory (NVM) as their main memory efficiently and effectively. In this work, we observed that during the construction of decision trees, random forest needs to utilize the randomness feature on choosing the “sample data”, so as to enhance the classification capability of random forest. However, such a random process on selecting sample data would incur a lot of duplicate I/O operations and a lot of writes on NVM main memory, thus reducing the lifetime of NVM. As such, we developed an “NVM-friendly bagging strategy” to reuse sample data for multiple runs without losing the classification accuracy by utilizing the fact that many sample data are selected and used in multiple runs of decision tree construction. Meanwhile, the sample data stored on NVM are rotated and evenly distributed to evenly wear the NVM space, so that the NVM lifetime can be optimized. The experiments show that the proposed bagging strategy can reduce up to 72% of writes during the construction of random forest. This pioneer work received the best paper award from IEEE NVMSA 2019 [2], where NVMSA is the most important conference in the field of non-volatile memory. 

[3] Cultivating Random Forest without Loss of Accuracy (ACM/IEEE ISLPED 2020 – Best Paper Award): This is a follow-up work of [2]. In this work, we observed that the decision tree training needs tree node pruning to avoid overfitting, which would decrease the prediction/classification accuracy of random forest; thus, we proposed a prediction strategy to predict the possibly to-be-pruned nodes and utilize the NVM multi-write modes to reduce the energy consumption on writing the to-be-pruned nodes, so that the energy consumption on random forest training can be significantly reduced. The experiments show that the average energy efficiency is improved for about 30%. This work has been accepted with the best paper award from top conference ACM/IEEE ISLPED 2020. This is the first time that a Taiwanese team can receive the best paper award from a top conference in the embedded and low-power system conference in the past 25 years.

[4] Achieving Lossless Accuracy with Lossy Programming for Efficient Neural-Network Training (ACM TECS journal in 2019, ACM/IEEE CODES+ISSS 2019 – Best Paper Award): In this direction, we study the key technology on training neural network (NN) over NVM-based systems. We developed a new NN training technique to enable NN training on NVM-based systems. In the past, it was hard to achieve both high training performance and high prediction accuracy with low energy consumption and low hardware cost. On NVM-based systems, by utilizing the approximate feature of neural network, we proposed to utilize the “lossy write” operation of NVM to resolve the write energy and training performance issues of NN training without losing the prediction accuracy of the trained neural network. This work is the first one that combines both theory and practicability to enable huge-scale NN training on NVM-based systems with high performance, low energy consumption, and high prediction accuracy. It has been accepted by top conference CODES+ISSS 2019 and received the best paper award. This is the first time that a Taiwanese team can receive the best paper award from a top conference in the embedded system and codesign field in the past 28 years. The research has not only made great contributions to the development of our domestic AI chips and AI computer systems, but also has created significant industrial impacts and competiveness.

[5] Enabling Sub-Block Erase for 3D NAND Memory (ACM/IEEE DAC 2016 – Best Paper Nomination): 3D flash memory has been lately developed to further increase the flash storage capacity. However, it also prolongs the latency on garbage collection (GC) because the number of pages in a block is increased to worsen the overheads on copying live pages. Based on such an observation, we are among the first teams that utilize the isolation hardware to enable sub-block erase in the flash management software for improving the GC performance of large-block 3D flash memory. In the sub-block erase design, we implement a new concept of “optimizing the reclaimed space per time unit” to take both block erase and live-page copy into consideration by concurrently erasing multiple sub-blocks having small enough number of live pages, where the GC overhead is reduced by up to 50%. This result has been published in ACM/IEEE DAC 2016 with best paper nomination, where DAC is a top conference in the embedded system and design automation field.

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[1] Yun-Sheng Chang, Yao Hsiao, Tzu-Chi Lin, Che-Wei Tsao, Chun-Feng Wu, Yuan-Hao Chang*, Hsiang-Shang Ko, and Yu-Fang Chen, "Determinizing Crash Behavior with a Verified Snapshot-Consistent Flash Translation Layer" USENIX Symposium on Operating Systems Design and Implementation (OSDI), Banff, Alberta, Canada, Nov. 4-6, 2020. (Acceptance rate: 17.6% (70/398)) (Top Conference)

[2] Yu Ting Ho, Chun-Feng Wu, Ming-Chang Yang, Tseng-Yi Chen, and Yuan-Hao Chang*, "Replanting Your Forest: NVM-friendly Bagging Strategy for Random Forest," IEEE Nonvolatile Memory Systems and Applications Symposium (NVMSA), 2019. (Best Paper Award)

[3] Tseng-Yi Chen, Yuan-Hao Chang*, Ming-Chang Yang, and Huang-Wei Chen, "How to Cultivate a Green Decision Tree without Loss of Accuracy?" ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED), 2020. (Best Paper Award - Top Conference)

[4] Wei-Chen Wang, Yuan-Hao Chang*, Tei-Wei Kuo, Chien-Chung Ho, Yu-Ming Chang, and Hung-Sheng Chang, "Achieving Lossless Accuracy with Lossy Programming for Efficient Neural-Network Training on NVM-Based Systems," ACM/IEEE International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), New York, NY, USA, Oct. 13-18, 2019. (Journal Track, Integrated with ACM TECS) (Best Paper Award - Top Conference)

[5] Tseng-Yi Chen, Yuan-Hao Chang*, Chien-Chung Ho, and Shuo-Han Chen, "Enabling Sub-blocks Erase Management to Boost the Performance of 3D NAND Flash Memory," ACM/IEEE Design Automation Conference (DAC), Austin, Texas, USA, Jun. 5-9, 2016. (Best Paper Nomination (2%) - Top Conference)